Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 405

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Serial Ports
Clock Rising Edge Select.
bit 12 (
). This bit selects whether
SPCTLx
CKRE
the serial port uses the rising edge (if set, = 1) or falling edge (if cleared,
= 0) of the clock signal for sampling data and the frame sync. This bit
applies to DSP Standard Serial and Multichannel modes only.
Frame Sync Required Select.
bits 13 (
). This bit selects
SPCTLx
FSR
whether the serial port requires (if set, = 1) or does not require (if cleared,
= 0) a transfer frame sync. See
"Frame Sync Options" on page 9-34
for
more details. This bit applies to DSP Standard Serial mode only.
Internal Frame Sync Select.
bit 14 (
). This bit selects whether
SPCTLx
IFS
the serial port uses an internally-generated frame sync (if set, = 1) or a
frame sync from an external (if cleared, = 0) source. This bit is used for
Standard DSP Serial mode only.
Low Active Frame Sync Select.
bit 16 (
). This bit selects the
SPCTLx
LFS
logic level of the (transmit or receive) frame sync signals. This bit selects
an active low frame sync (if set, = 1) or active high frame sync (if cleared,
= 0). Active high (0) is the default. This bit applies to DSP Standard Serial
mode only.
Late Transmit Frame Sync Select.
bit 17 (
). This bit selects
SPCTLx
LAFS
when to generate the frame sync signal. This bit selects a late frame sync if
set (= 1) during the first bit of each data word. This bit selects an early
frame sync if cleared (= 0) during the serial clock cycle immediately pre-
ceding the first data bit. See
"Frame Sync Options" on page 9-34
for more
details.
This bit applies to DSP Standard Serial mode. This bit is also used to
2
select between I
S and Left-justified Sample Pair modes. See
Table 9-1 on
page 9-10
and
"Standard DSP Serial Mode" on page 9-11
for more
information.
Serial Port DMA Enable.
bits 18 and 20 (
and
).
SPCTLx
SDEN_A
SDEN_B
This bit enables (if set, = 1) or disables (if cleared, = 0) the serial port's
channel DMA. Bits 18 and 20 apply to all operating modes.
ADSP-2126x SHARC Processor Hardware Reference
9-55

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