Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 801

G GLOSSARY
Autobuffering Unit (ABU). See I/O processor on
page G-3.
Arithmetic Logic Unit (ALU). This part of a processing element performs
arithmetic and logic operations on fixed-point and floating-point data.
Auxiliary registers. See Index Registers on
Base address. The starting address of a circular buffer to which the DAG
wraps around. This address is stored in a DAG Bx register.
Base registers. A base (Bx) register is a Data Address Generator (DAG)
register that sets up the starting address for a circular buffer.
Bit-reverse addressing. The Data Address Generator (DAG) provides a
bit-reversed address during a data move without reversing the stored
address.
Block repeat. See Do/Until instructions in ADSP-21160 DSP Instruction
Set Reference.
Block size register. See Length Registers on
Broadcast data moves. The Data Address Generator (DAG) performs dual
data moves to complementary registers in each processing element to sup-
port SIMD mode.
ADSP-2126x SHARC Processor Core Manual
page G-5
page G-5.
page G-6.
and DMA on
G-1