General-Purpose I/O (Gpio) And Flags; Miscellaneous Signals; Relationship To The Core - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

General-Purpose I/O (GPIO) and Flags

General-Purpose I/O (GPIO) and Flags
Any of the DAI pins may also be considered general-purpose input/output
(GPIO) pins. Each of the DAI pins can also be set to drive a high or low
logic level signal to assert signals. They can also be connected to miscella-
neous signals and used as interrupt sources or as control inputs to other
blocks. Other than these, out of the 16 flags available, six (10:15) can use
20 DAI pins.

Miscellaneous Signals

In a standard SHARC processor, a clock out connects to a clock in. Like-
wise, a frame sync out is connected to a frame sync in, and a data out is
connected to a data in, and so on. In the ADSP-2126x processor, there are
exceptions to these standard connection practices. Signals:
• May also be configured as interrupt sources
• Can be configured as invert signals (forcing a signal to active low)
• Can connect one pin to another
• Can be configured as pin enables
DAI Interrupt Controller
The DAI contains a dedicated Interrupt Controller that signals the core
when DAI-peripheral events have occurred.

Relationship to the Core

Generally, interrupts are classified as catastrophic or normal. Catastrophic
events include any hardware interrupts (for example, resets) and emula-
tion interrupts (under the control of the PC), math exceptions, and
12-26 ADSP-2126x SHARC Processor Hardware Reference