Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 171

Programs should change the interrupt nesting enable (
while outside of an interrupt service routine or during the reset service
routine.
If nesting is enabled and a higher priority interrupt occurs immediately
after a lower priority interrupt, the service routine of the higher priority
interrupt is delayed by one cycle. This delay allows the first instruction of
the lower priority interrupt routine to be executed, before it is
interrupted.
When servicing nested interrupts, the DSP uses the interrupt mask
pointer (
IMASKP
interrupt nesting; the
each time a higher priority interrupt interrupts a lower priority ser-
IMASKP
vice routine.
The bits in
IMASKP
an interrupt occurs, the DSP sets its bit in
the DSP uses
IMASKP
ing all interrupts of equal or lower priority to the highest priority bit set in
and keeping higher priority interrupts the same as in
IMASKP
a return from an interrupt service routine (
the highest priority bit set in
rupt mask.
The DSP masks all interrupts of equal or lower priority to the highest pri-
ority bit set in
always corresponds to the priority of the interrupt being serviced.

The
MSKP
are for interrupt controller use only. Modifying these bits interferes
with the proper operation of the interrupt controller. Furthermore,
explicit bit manipulation of any bit in the
IRPTEN
be serviced twice.
ADSP-2126x SHARC Processor Hardware Reference
) to create a temporary interrupt mask for each level of
value is not effected. The DSP changes
IMASK
correspond to the interrupts in order of priority. When
to generate a new temporary interrupt mask, mask-
IMASKP
. The bit set in
IMASKP
bits in the
LIRPTL
bit (bit 12 in the
MODE1
Program Sequencer
. If nesting is enabled,
IMASKP
) is executed, the DSP clears
RTI
and generates a new temporary inter-
that has the highest priority
IMASKP
register, and the entire
LIRPTL
register) is set causes an interrupt to
) bit only
NESTM
. When
IMASK
register
IMASKP
register while the
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