Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 169

push occurs when the stack is already full. Bits in the
cate the status stack full and empty states as describe below.
• Status stack overflow. Bit 23 (
is overflowed (if 1) or not overflowed (if 0)—a sticky bit.
• Status stack empty. Bit 24 (
empty (if 1) or not empty (if 0)—not sticky, cleared by a
For some interrupts, (
cally pushes the
When the sequencer pushes an entry onto the status stack, the DSP uses
the register to clear the corresponding bits in the
MMASK
other bit settings remain the same. For more information and an example
of how the
MMASK
Register (MODE1)" on page
The sequencer automatically pops the
from the status stack during the return from interrupt instruction (
In one other case,
mation, see "Reusing Interrupts" on page 3-60.
timer expired interrupts cause the sequencer to push an entry onto the sta-
tus stack. All other interrupts require either explicit saves and restores of
effected registers or an explicit push or pop of the stack (
Pushing the
ASTATx
control bit settings. This allows a service routine to alter these bits with
the knowledge that the original settings are automatically restored upon
the return from the interrupt.
The top of the status stack contains the current values of
and . Reading and writing these registers does not move the stack
MODE1
pointer. Explicit
ADSP-2126x SHARC Processor Hardware Reference
and timer expired), the sequencer automati-
IRQ2–0
, , and
ASTATx ASTATy
and registers work together, see
MODE1
A-4.
( ), the sequencer pops the stack.
JUMP CI
, , and
ASTATy MODE1
or instructions do move the status stack pointer.
PUSH POP
Program Sequencer
) indicates that the status stack
SSOV
) indicates that the status stack is
SSEM
registers onto the status stack.
MODE1
,
ASTATx ASTATY
Only the
registers preserves the status and
register indi-
STKYx
.
PUSH
register. All
MODE1
"Mode Control 1
, and registers
MODE1
).
RTI
For more infor-
and
IRQ2–0
/ ).
PUSH POP STS
,
ASTATx ASTATy
3-57
,