Input Data Port Programming Example - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Input Data Port Programming Example

More than one DMA channel may have completed during this
time period. For each, a bit is latched in the
DAI_IRPTL_H
grammed. If any of the channels is not used, then its clock and
frame sync must be held
5. Read the
rupts have been generated.
• If the value(s) are not zero, repeat step 4.
• If the value(s) are zero, continue to step 6.
6. Re-enable the
7. Exit the ISR.
If a zero is read in step 5 (no more interrupts are latched), then all of the
interrupts needed for that ISR have been serviced. If another DMA com-
pletes after step 5 (that is, during steps 6 or 7), as soon as the ISR
completes, the ISR is called again because the OR of the latched bits will
be nonzero again. DMAs in process run to completion.

If step 5 is not performed, and a DMA channel expires during step
4, then when IDP DMA is re-enabled (step 6) the completed DMA
will not have been reprogrammed and its buffer will overrun.
Input Data Port Programming Example
Listing 11-1 shows a data transfer using an interrupt service routine (ISR).
The transfer takes place through the Digital Audio Interface (DAI). This
code implements the algorithm outlined in
Transfer" on page
11-24
registers. Ensure that the DMA registers are repro-
LOW
or
DAI_IRPTL_L DAI_IRPTL_H
bit in the
IDP_DMA_EN
11-15.
ADSP-2126x SHARC Processor Hardware Reference
DAI_IRPTL_L
.
registers to see if more inter-
register (set to 1).
IDP_CTL
"FIFO to Memory Data
or