Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 228

Accessing Memory
When data is accessed using long word addressing, the data is always long
word aligned on 64-bit boundaries in internal memory space. When data
is accessed using normal word addressing and the
gram should maintain this alignment by using an even normal word
address (least significant bit of address = 0). This register selection aligns
the normal word address with a 64-bit boundary (long word address).
All long word accesses load or store two consecutive 32-bit data values.
The register file source or destination of a long word access is a set of two
neighboring data registers in a processing element. In a forced long word
access (uses the
moves to or from the explicit register in the neighbor-pair, and the odd
(normal word address) location moves to or from the implicit register in
the neighbor-pair. For example, the following long word moves could
occur:
DM(0x80000) = R0 (LW);
/* The data in R0 moves to location DM(0x80000), and the data in
R1 moves to location DM(0x80001) */
R0 = DM(0x80003)(LW);
/* The data at location DM(0x80002) moves to R0, and the data at
location DM(0x80003) moves to R1 */
The example shows that
cessing element.
that apply to long word accesses.
In unforced long word accesses (accesses to
places the lower 32 bits of the long word in the named (explicit) register
and places the upper 32 bits of the long word in the neighbor (implicit)
register.
5-24
mnemonic), the even (normal word address) location
LW
and
R0 R1
Table 5-3 lists the other neighbor register assignments
ADSP-2126x SHARC Processor Hardware Reference
mnemonic, the pro-
LW
are neighbor registers in the same pro-
memory space), the DSP
LW