Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 296

IOP/Core Interaction Options
Table 7-1. DMA Interrupt Vector Locations (Cont'd)
Associated Register(s)
LIRPTL
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
LIRPTL
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
IRPTL/IMASK
(high priority option)
LIRPTL
(low priority option)
7-6
Bits Vector Interrupt
Address Name
2 0x4C SP4I
12 0x30 SPIHI
9 0x74 SPILI
3 0x50 PPI
11 0x2C DAIHI
6 0x5C DAILI
11 0x2C DAIHI
6 0x5C DAILI
11 0x2C DAIHI
6 0x5C DAILI
11 0x2C DAIHI
6 0x5C DAILI
11 0x2C DAIHI
6 0x5C DAILI
11 0x2C DAIHI
6 0x5C DAILI
ADSP-2126x SHARC Processor Hardware Reference
DMA Data Buffer
Channel
11 RXSP4B, TXSP4B
20 RXSPI, TXSPI
21 RXPP, TXPP
12 IDP_FIF0
13 IDP_FIF0
14 IDP_FIF0
15 IDP_FIF0
16 IDP_FIF0
17 IDP_FIF0