MODE1
X
Y
MULTIPLIER
MRF2
ASTATx
TO PROGRAM SEQUENCER
Figure 2-1. Computational Block
Numeric Formats
The DSP supports the 32-bit single-precision floating-point data format
defined in the IEEE Standard 754/854. In addition, the DSP supports an
extended-precision version of the same format with eight additional bits in
the mantissa (40 bits total). The DSP also supports 32-bit fixed-point for-
mats—fractional and integer—which can be signed (twos-complement) or
unsigned.
ADSP-2126x SHARC Processor Hardware Reference
PM DATA BUS
DM DATA BUS
REGISTER FILE
(16 x 40-BIT)
R0
R8
R1
R9
R2
R10
R3
R11
R4
R12
R5
R13
R6
R14
R7
R15
MRF1
MRF0
STKYx
Processing Elements
Z
Y
X
Y
ALU
SHIFTER
X
2-3
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