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I/O Processor Registers
SRU_DAT2 (0x2442)
Reserved
SPORT5_DB_I
Serial Port 5 Data Channel B Input
Figure A-40. SRU_DAT2 Register
SRU_DAT3 (0x2444)
Reserved
IDP3_DAT_I
Input Data Port 3 Data Input
15 14 13 12 11 10
0
IDP1_DAT_I
Input Data Port 1 Data Input
IDP0_DAT_I
Input Data Port 0 Data Input
Figure A-41. SRU_DAT3 Register
A-120
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
0
0
0
0
0
0
0
15 14 13 12 11 10
9
8
0
0
0
0
0
1
0
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0
0
0
0
0
0
0
0
9
8
0
0
0
0
0
0
0
ADSP-2126x SHARC Processor Hardware Reference
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
SPORT5_DA_I
Serial Port 5 Data
Channel A Input
0
IDP2_DAT_I
Input Data Port 2
Data Input
Reserved
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