32
TXSPxA
TRANSMIT DATA
BUFFER
HARDWARE
COMPANDING
(COMPRESSION)
SPORTS 0, 2 & 4 ONLY
32
TRANSMIT SHIFT
REGISTER
SPTRAN = 1
TX ENABLE
SPORTX_DA_OUT
SPORTX_DA_IN
SPORTX_DA
Figure 9-1. Serial Port Block Diagram
9-4
DM DATA BUS
DM DATA BUS
PM DATA BUS
PM DATA BUS
I/O DATA BUS
I/O DATA BUS
32
32
RXSPxA
RECEIVE DATA BUFFER
HARDWARE
COMPANDING
(EXPANSION)
SPORTS 1, 3 & 5 ONLY
32
RECEIVE SHIFT
REGISTER
SPTRAN = 0
RX ENABLE
SPORTX_CLK
SPORTX_FS
SPTRAN
SERIAL PORT
CONTROL
SPORTX_FS
ADSP-2126x SHARC Processor Hardware Reference
32
TXSPxB
TRANSMIT DATA BUFFER
32
32
TRANSMIT SHIFT
REGISTER
SPTRAN = 1
TX ENABLE
CNTL
SPORTX_DB_OUT
SPORTX_CLK
32
32
RXSPxB
RECEIVE DATA BUFFER
32
32
RECEIVE SHIFT
REGISTER
SPTRAN = 0
RX ENABLE
SPORTX_DB_IN
SPORTX_DB
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