Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 257

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ANY BLOCK
...
...
...
63-48
PM DATA
BUS
PEX REGISTERS
RB
39-24
23-8
7-0
PEY REGISTERS
SB
39-24
23-8
7-0
OTHER INSTRUCTIONS WITH SIMILAR DATA FLOWS FOR SISD OR SIMD, LONG WORD, SINGLE-DATA TRANSFERS ARE:
Figure 5-21. Long Word Addressing of Single-Data
ADSP-2126x SHARC Processor Hardware Reference
MEMORY
...
...
...
...
...
...
...
...
...
WORD Y2
WORD Y1
WORD Y0
NO ACCESS
47-32
31-16
15-0
RA
39-24
23-8
7-0
SA
39-24
23-8
7-0
THIS EXAMPLE SHOWS THE DATA FLOW FOR INSTRUCTION:
RX = DM(LONG WORD X0 ADDRESS);
UREG = PM(LONG WORD ADDRESS);
UREG = DM(LONG WORD ADDRESS);
PM(LONG WORD ADDRESS) = UREG;
DM(LONG WORD ADDRESS) = UREG;
ANY OTHER BLOCK
...
...
...
...
...
...
WORD X2
WORD X1
WORD X0
LONG WORD ACCESS
63-48
47-32
DM DATA
WORD X0
BUS
RY
39-24
23-8
7-0
WORD X0, 63-32
0X00
SY
39-24
23-8
7-0
Memory
...
...
...
...
...
...
31-16
15-0
RX
39-24
23-8
7-0
0X00
WORD X0, 31-0
SX
39-24
23-8
7-0
5-53

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