Parallel Port External Setup Registers; Using The Parallel Port - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

This 24-bit register contains the number of words in external
memory to be transferred via DMA.

Parallel Port External Setup Registers

The following registers must be initialized for both core-driven and
DMA-driven transfers.
• Parallel Port DMA External Index Address (
This 24-bit register contains the external memory byte address used
for core-driven and DMA driven transfers.
• Parallel Port External Address Modifier (
This 2-bit register contains the external memory DMA address
modifier. It supports only +1, 0, –1. After each data cycle, the
register is modified by this value.

Using the Parallel Port

There are a number of considerations to make when interfacing to parallel
external devices. This section describes the different the ways that the par-
allel port can be used to access external devices. Considerations for
choosing between an 8-bit and a 16-bit wide interface are discussed in
"Comparison of 16-Bit and 8-Bit SRAM Modes" on page
External parallel devices can be accessed in two ways, either using
DMA-driven transfers or core-driven transfers. DMA transfers are per-
formed in the background by the I/O Processor and are generally used to
move blocks of data. To perform DMA transfers, the address, word-count,
and address-modifier are specified for both the source and destination buf-
fers (one internal, one external). Once initiated, (by setting
= 1), the IOP performs the specified transfer in the background
PPDEN
without further core interaction. The main advantage of DMA transfers
ADSP-2126x SHARC Processor Hardware Reference
Parallel Port
) register
EIPP
) register
EMPP
8-11.
= 1 and
PPEN
EIPP
8-17