Table of Contents
Advertisement
FLAGS (Bits 15-0)
FLG7O
FLAG7 Output Select
FLG7
FLAG7 Value
FLG6O
FLAG6 Output Select
FLG6
FLAG6 Value
FLG5O
FLAG5 Output Select
FLG5
FLAG5 Value
FLG4O
FLAG4 Output Select
FLG4
FLAG4 Value
-For all FLGx bits, FLAGx values are as follows: 0=low, 1=high.
-For all FLGxO bits, FLAGx output selects are as follows: 0=FLAGx Input, 1=FLAGx Output.
-U indicates the bit value is unknown at reset.
Figure A-12. FLAGS Register (Lower Bits)
System Control Register (SYSCTL)
The
register is used to set up system configuration selections. This
SYSCTL
register's address is 0x30024. The reset value for this register is zero. Bit
descriptions for this register are shown in
Table
A-15. The reset value has all bits initialized to zero.
ADSP-2126x SHARC Processor Hardware Reference
15 14 13 12 11 10
9
8
0
U
0
U
0
U
0
U
Registers Reference
7
6
5
4
3
2
1
0
0
U
0
U
0
U
0
U
Figure A-13
FLG0
FLAG0 Value
FLG0O
FLAG0 Output Select
FLG1
FLAG1 Value
FLG1O
FLAG1 Output Select
FLG2
FLAG2 Value
FLG2O
FLAG2 Output Select
FLG3
FLAG3 Value
FLG3O
FLAG3 Output Select
and described in
A-43
Advertisement
Table of Contents
Need help?
Do you have a question about the ADSP-21261 SHARC and is the answer not in the manual?
Questions and answers