Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 624

Core Registers
Core Registers
The DSP has general-purpose and dedicated registers in each of its func-
tional blocks. The register reference information for each functional block
includes bit definitions, initialization values, and memory-mapped
addresses (for I/O processor registers). Information on each type of regis-
ter is available at the following locations:
• "Control and Status System Registers" on page A-3
• "Processing Element Registers" on page A-20
• "Program Sequencer Registers" on page A-23
• "Data Address Generator Registers" on page A-37
• "Peripheral Timer Registers" on page A-157
• "Power Management Registers" on page A-65
When writing DSP programs, it is often necessary to set, clear, or test bits
in the DSP's registers. While these bit operations can all be done by refer-
ring to the bit's location within a register or (for some operations) the
register's address with a hexadecimal number, it is much easier to use sym-
bols that correspond to the bit's or register's name. For convenience and
consistency, Analog Devices provides a header file that contains these bit
and registers definitions. CrossCore Embedded Studio provides proces-
sor-specific header files in the
tools includes a #include file in the

Many registers have reserved bits. When writing to a register, pro-
grams may only clear (write zero to) the register's reserved bits.
A-2
SHARC/include
VisualDSP/2126x/
ADSP-2126x SHARC Processor Hardware Reference
directory. VisualDSP++
include directory.