Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 19

DMA Registers .................................................................... 10-39
SPI DMA Internal Index Register (IISPI) ........................ 10-39
SPI DMA Address Modifier Register (IMSPI) .................. 10-39
SPI DMA Word Count Register (CSPI) ........................... 10-40
Error Signals and Flags .............................................................. 10-40
Mode Fault Error (MME) .................................................... 10-40
Transmission Error Bit (TUNF) ........................................... 10-41
Reception Error Bit (ROVF) ................................................ 10-42
Transmit Collision Error Bit (TXCOL) ................................ 10-42
Programming Model ................................................................. 10-42
Master Mode Core Transfers ................................................ 10-43
Slave Mode Core Transfers ................................................... 10-44
Master Mode DMA Transfers ............................................... 10-45
Slave Mode DMA Transfers ................................................. 10-47
Chained DMA Transfers ...................................................... 10-48
Stopping Core Transfers ....................................................... 10-49
Stopping DMA Transfers ..................................................... 10-50
Switching from Transmit To Transmit/Receive DMA ............ 10-50
Switching from Receive to Receive/Transmit DMA ............... 10-52
DMA Error Interrupts ......................................................... 10-53
INPUT DATA PORT
Serial Inputs ............................................................................... 11-3
ADSP-2126x SHARC Processor Hardware Reference
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