Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 401

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clear the Serial Port Control register before the new mode is written to the

There is one Global Control and Status register for each paired SPORT

(SPORT0/1, SPORT 2/3 and SPORT 4/5) for multichannel operation.

number of channels, provide the status of the current channel, enable

multichannel operation, and set the multichannel frame delay. These reg-

isters are described in

(SPMCTLxy)" on page

registers control the operating modes of the serial ports for the

I/O processor.

Table 9-6. SPCTLx Control Bit Comparison in Four SPORT Operation

Standard DSP

ADSP-2126x SHARC Processor Hardware Reference

"SPORT Multichannel Control Registers

lists all the bits in the

Left-justified and I

Sample Pair Mode

. These registers define the

Multichannel Mode

Transmit Control Bits

Serial Ports

Receive Control

Bits (SPORT1, 3,

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