Long Word Addressing Of Single-Data - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Internal Memory Access Listings

Long Word Addressing of Single-Data

Figure 5-21 displays one possible single-data, long word addressed access.
For long word addressing, the processor treats each data bus as a 64-bit
long word lane. The 64-bit value for the long word access completes a
transfer using the full width of the PM or DM data bus.
In Figure 5-21, the access targets a
operation. Long word single-data access operate the same in SISD or
SIMD mode. This instruction accesses
targets register
The processor zero-fills the least significant 8 bits of both the registers.
The example targets
5-52
and implicitly targets its neighbor register,
RX
registers when using the syntax
PEy
ADSP-2126x SHARC Processor Hardware Reference
register in a SISD or SIMD mode
PEx
with syntax that explicitly
WORD X0
, in .
RY PEx
.
SX