Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 654

Core Registers
Table A-10. LIRPTL Register Bit Descriptions
Bit Name
0 P6I
1 P7I
2 P8I
3 P9I
4 P10I
5 P11I
6 P12I
7 P13I
8 P17I
9 P18I
10 P6IMSK
11 P7IMSK
12 P8IMSK
13 P9IMSK
14 P10IMSK
15 P11IMSK
16 P12IMSK
17 P13IMSK
18 P17IMSK
19 P18IMSK
20 P6IMSKP
A-32
Definition
Programmable Interrupt 6.
Programmable Interrupt 7
Programmable Interrupt 8
Programmable Interrupt 9
Programmable Interrupt 10
Programmable Interrupt 11
Programmable Interrupt 12
Programmable Interrupt 13
Programmable Interrupt 17
Programmable Interrupt 18
Programmable Interrupt Mask 6.
Unmasks the P6I interrupt (if set, = 1),
or masks the P6I interrupt (if cleared, = 0).
Programmable Interrupt Mask 7. See P6IMSK.
Programmable Interrupt Mask 8. See P6IMSK.
Programmable Interrupt Mask 9. See P6IMSK.
Programmable Interrupt Mask 9. See P6IMSK.
Programmable Interrupt Mask 11. See P6IMSK.
Programmable Interrupt Mask 12. See P6IMSK.
Programmable Interrupt Mask 12. See P6IMSK.
Programmable Interrupt Mask 17. See P6IMSK.
Programmable Interrupt Mask 18. See P6IMSK.
Programmable Interrupt Mask Pointer 9. When the pro-
cessor is servicing another interrupt, indicates if the P6I
interrupt is unmasked (if set, = 1), or the P6I interrupt is
masked (if cleared, = 0).
ADSP-2126x SHARC Processor Hardware Reference