Stopping Dma Transfers; Switching From Transmit To Transmit/Receive Dma - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

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Programming Model

Stopping DMA Transfers

When performing transmit DMA transfers, data moves through a four
deep SPI DMA FIFO, then into the
shift register. DMA interrupts are latched when the I/O processor moves
the last word from memory to the peripheral. For the SPI, this means that
the SPI "DMA complete" interrupt is latched when there are six words
remaining to be transmitted (four in the FIFO, one in the
and one being shifted out of the shift register). To disable the SPI port
after a DMA transmit operation, use the following steps:
1. Wait for the DMA FIFO to empty. This is done when the
bits (bits 13–12 in the
2. Wait for the
bit, (bit 3) in the
When stopping receive DMA transfers, it is recommended that
programs follow the SPI disable steps provided in
Receive to Receive/Transmit DMA"
3. Wait for the SPI shift register to finish transferring the last word.
This is done when the
becomes one.
4. Disable the SPI ports by setting the
registers to zero.

Switching from Transmit To Transmit/Receive DMA

The following sequence details the steps for switching from transmit to
receive DMA.
10-50
TXSPIx
SPIDMACx
registers to empty. This is done when the
TXSPIx
registers becomes zero.
SPISTATx
bit (bit 0) of the
SPIF
ADSP-2126x SHARC Processor Hardware Reference
buffers, and finally into the
registers) become zero.
"Switching from
below.
SPISTATx
bit (bit 0) of the
SPIEN
buffers,
TXSPIx
SPISx
TXS
registers
SPICTLx

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