Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 411

Overflow/Underflow status bits are set when an overflow or underflow
occurs. In multichannel mode, the
to the fixed-directional functionality of the
,
SPCTL1 SPCTL3
mode, the Receive Overflow bit
received new data while the
,
SPCTL0 SPCTL2
mode, the transmit overflow bit (
signal (
SPORT0_FS/SPORT2_FS/SPORT4_FS
buffer was empty.

The
ROVF_A
the
SPCTLx
either the
TUVF_A
When the SPORT is configured as a transmitter (
mit frame sync occurs and no new data has been loaded into the transmit
buffer, a Transmit Underflow status bit is set in the Serial Port Control
register. The
TUVF_A/ROVF_A
cleared by disabling the serial port.
When the SPORT is configured as a receiver (
fers are activated. The receive buffers act like a three-location FIFO
because they have two data registers plus an input shift register. Two com-
plete 32-bit words can be stored in the receive buffer while a third word is
being shifted in. The third word overwrites the second if the first word has
not been read out (by the processor core or the DMA controller). When
this happens, the Receive Overflow Status bit is set in the Serial Port Con-
trol register. Almost three complete words can be received without the
receive buffer being read before an overflow occurs. The overflow status is
generated on the last bit of the third word. The
status bit is sticky and is cleared only by disabling the serial port.
An interrupt is generated when the receive buffer has been loaded with a
received word (for example, the receive buffer is not empty). This
ADSP-2126x SHARC Processor Hardware Reference
and registers are configured for Multichannel
SPCTL5
ROVF_A
RXS_A
and registers are configured for Multichannel
SPCTL4
or (bit 29) Overflow/Underflow status bit in
TUVF_A
register becomes fixed in Multichannel mode only as
Overflow Status bit (SPORTs 1, 3, and 5) or
ROVF
Underflow Status bit (SPORTs 0, 2, and 4).
or
TUVF_A
or
ROVF_A TUVF_A
registers. When the
SPCTLx
indicates when the A channel has
buffer is full. Similarly, when the
) indicates that a new frame sync
TUVF_A
) was generated while the
SPTRAN
status bit is sticky and is only
SPTRAN
ROVF_A/ROVF_A
Serial Ports
bits are redefined due
TXSPxA
=1), and a trans-
= 0), the receive buf-
or
TUVF_A
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