Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 393

each SPORT. Companding is selected by the
Control register.

Companding is supported on the A channel only. SPORTs 0, 2,
and 4 primary channels are capable of compression, while SPORTs
1, 3, and 5 primary channels are capable of expansion.
In Multichannel mode, when companding is enabled, the number
of channels must be programmed via the
register before writing to the transmit FIFO. The
registers should also be written before writing to transmit
CCsn
FIFO.
When companding is enabled, the data in the
right-justified, sign-extended expanded value of the eight received LSBs. A
write to
TXSPxA
the width of the transmit word) before it is transmitted. If the 32-bit value
is greater than the 13-bit A-law or 14-bit
cally compressed to the maximum value.
Since the values in the transmit and receive buffers are actually com-
panded in place, the companding hardware can be used without
transmitting (or receiving) any data, for example during testing or debug-
ging. This operation requires one cycle of overhead, as described below.
For companding to execute properly, program the SPORT registers prior
to loading data values into the SPORT buffers.
To compand data in place without transmitting:
1. Set the
SPEN_B
2. Enable companding in the
Control register.
3. Write a 32-bit data word to the transmit buffer. Companding is
calculated in this cycle.
ADSP-2126x SHARC Processor Hardware Reference
compresses the 32-bit value to eight LSBs (zero-filled to
bit to 1 in the
SPTRAN
bits should be =0.
field of the
DTYPE
NCH
RXSPxA

-law maximum, it is automati-
register. The
SPCTLx
field of the
DTYPE
Serial Ports
SPCTLx
bit in the
SPMCTLxy
and
MTxCSn MTx-
buffers is the
and
SPEN_A
Transmit
SPCTLx
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