Secondary Processing Element (PEy)
Table 2-15. SIMD Mode Complementary Register Pairs (Cont'd)
PEx
R14
ASTATx
STKYx
Table 2-16. Other Complementary Register Pairs
USTAT1
USTAT3
PX1
MRF
MRB
1 These register pairs are not directly accessible by instruc-
tions. However, these registers can be read using the mul-
tiplier operation MRxF/B = Rn/Rn = MRxF/B. For more
information on this instruction, see Chapter 7 in
SHARC Processor Programming Reference.
2-48
PEy
S14
ASTATy
STKYy
USTAT2
USTAT4
PX2
1
MSF
MSB1
ADSP-2126x SHARC Processor Hardware Reference
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