Timer And Sequencing - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Timer and Sequencing

Timer and Sequencing
The sequencer includes a programmable interval timer, which appears in
Figure 3-1 on page
control timer operations as described below.
• Timer enable
enable (if 1) or disable (if 0) the timer.
• Timer count (
timer count value, counting down the cycles between timer
interrupts.
• Timer period (
indicating the number of cycles between timer interrupts.
Table A-3 on page A-8
The register contains the timer counter. The timer decrements the
TCOUNT
register during each clock cycle. When the
TCOUNT
zero, the timer generates an interrupt and asserts the
nario applies only when
four cycles (when the timer is enabled), as shown in
clock cycle after
from the
TCOUNT
The value specifies the frequency of timer interrupts. The num-
TPERIOD
ber of cycles between interrupts is
32
is 2
TPERIOD
zero.
To start and stop the timer, programs use the
With the timer disabled (
tial count value and loads
desired interval. Then, the program enables the timer (
the count.
3-46
3-3. Bits in the
Bit 5 (
MODE2
). This register contains the decrementing
TCOUNT
). This register contains the timer period,
TPERIOD
lists all of the bits in the
is configured as
TCOUNT
reaches zero, the timer automatically reloads
TCOUNT
register.
TPERIOD
– 1. This value is loaded into
=0), the program loads
TIMEN
TPERIOD
ADSP-2126x SHARC Processor Hardware Reference
, , and
MODE2 TCOUNT
). This bit directs the DSP to
TIMEN
MODE2
TCOUNT
TIMEXP
+ 1. The maximum value of
TPERIOD
after it decrements to
TCOUNT
MODE2
with the number of cycles for the
registers
TPERIOD
register.
value reaches
pin. This sce-
TIMEXP
output high for
Figure 3-5. On the
register's bit.
TIMEN
with an ini-
TCOUNT
=1) to begin
TIMEN