Manual Contents - Analog Devices ADSP-21261 SHARC Hardware Reference Manual

Manual Contents

Manual Contents
The manual consists of:
• Chapter 1,
Provides an architectural overview of the ADSP-2126x processor.
• Chapter 2,
Describes the arithmetic/logic units (ALUs), multiplier/accumula-
tor units, and shifter. The chapter also discusses data formats, data
types, and register files.
• Chapter 3,
Describes the operation of the program sequencer, which controls
program flow by providing the address of the next instruction to be
executed. The chapter also discusses loops, subroutines, jumps,
interrupts, exceptions, and the
• Chapter 4,
Describes the Data Address Generators (DAGs), addressing modes,
how to modify DAG and pointer registers, memory address align-
ment, and DAG instructions.
• Chapter 5,
Describes all aspects of processor memory including internal mem-
ory, address and data bus structure, and memory accesses.
• Chapter 6,
Discusses the JTAG standard and how to use the ADSP-2126x in a
test environment. Includes boundary-scan architecture, instruc-
tion, and breakpoint registers.
• Chapter 7,
Describes ADSP-2126x input/output processor architecture.
xxxii
"Introduction"
"Processing Elements"
"Program Sequencer"
"Data Address Generators"
"Memory"
"JTAG Test Emulation Port"
"I/O Processor"
ADSP-2126x SHARC Processor Hardware Reference
instruction.
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