Analog Devices ADSP-21261 SHARC Hardware Reference Manual page 14

Contents
Using the Parallel Port ................................................................ 8-17
DMA Transfers ..................................................................... 8-18
Core Driven Transfers ........................................................... 8-18
Known Duration Accesses ................................................. 8-20
Status Driven Transfers (Polling) ....................................... 8-22
Core-Stall Driven Transfers ............................................... 8-22
Interrupt Driven Accesses ................................................. 8-22
Parallel Port Programming Examples ........................................... 8-23
SERIAL PORTS
Serial Port Signals ......................................................................... 9-5
SPORT Operation Modes ............................................................. 9-9
Standard DSP Serial Mode .................................................... 9-11
Standard DSP Serial Mode Control Bits ............................ 9-11
Clocking Options ............................................................ 9-11
Frame Sync Options ......................................................... 9-12
Data Formatting ............................................................... 9-12
Data Transfers .................................................................. 9-13
Status Information ........................................................... 9-13
Left-Justified Sample Pair Mode ............................................ 9-14
Setting the Internal Serial Clock and Frame Sync Rates ..... 9-15
Left-Justified Sample Pair Mode Control Bits .................... 9-15
Setting Word Length (SLEN) ............................................ 9-15
Enabling SPORT Master Mode (MSTR) ........................... 9-16
Selecting Transmit and Receive Channel Order (FRFS) ..... 9-16
xiv ADSP-2126x SHARC Processor Hardware Reference