Texas Instruments OMAP5912 Reference Manual page 82

OMAP3.2 Features
24 OMAP3.2 Subsystem
H
Constant
H
Post-increment
H
Single indexing
H
Double indexing
J
Different indexing for source-respective destination
J
Logical channel chaining
J
Software enabling
J
Hardware enabling
J
Logical channel interleaving
J
Logical channel preemption
J
Two choices of logical channel arbitration of physical resources,
round robin or fixed
J
Two levels of logical channel priority
J
Constant fill
J
Transparent copy
J
Rotation 0, 90, 180, and 270
J
Seven ports enabling:
H
Memory-to-memory transfers
H
Peripheral-to-memory transfers
H
Memory-to-peripheral transfers
H
Peripheral-to-peripheral transfers
J
Binary backward-compatible by default configuration
J
Up to four logical channels active in parallel
The logical channel dedicated to the display, LCh−D, has several addition-
al features:
J
Channel can be shared by two LCD controllers
J
Supports both single- and dual-block modes
J
Supports separate indexing and numbering for dual-block mode for
both elements and frames
SPRU749A