Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1352

Sharc+ processor
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Normal Boot Operation
8. Program the Rx FIFO threshold value in bytes in the
be set to half the FIFO depth.
9. Program the following fields: MSI_CMD.STARTCMD =1'b1, MSI_CMD.BOOTEN =1'b1,
MSI_CMD.XPECTBOOTACK (for start-acknowledge pattern ACK from the card) and MSI_CMD.DXPECT
=1'b1.
10. If MSI_CMD.XPECTBOOTACK =1'b1, the software driver must start a timer after step 9; the terminal value is
50 ms.
• Before this timer elapses, the BAR interrupt should be received from the MSI. If this action does not oc-
cur, program the CMD register as follows:
MSI_CMD.STARTCMD =1'b1
MSI_CMD.BOOTDIS =1'b1
All other fields = 0
• The MSI generates a Command Done (CD) interrupt after de-asserting the CMD line of the card. In
IDMAC:
Descriptor is closed
MSI_IDSTS.CES =1, indicating BAR timeout
MSI_IDSTS.RI =0
• If the BAR interrupt is received, the software should clear this interrupt by writing a 1 to it. The software
should then start another timer with a terminal value of 1 – 0.05 = 0.95 seconds. Before this timer elapses,
the BDS interrupt should be received from the MSI. If this action does not occur, the software driver
must program the CMD register as follows:
MSI_CMD.STARTCMD =1'b1
MSI_CMD.BOOTDIS =1'b1
All other fields =0
• The MSI generates a CD interrupt after de-asserting the CMD line of the card. In IDMAC:
Descriptor is closed
MSI_IDSTS.CES =1, indicating BDS timeout
MSI_IDSTS.RI =0
• If the BDS interrupt is received, it indicates that the boot data is being received from the card. The ID-
MAC engine starts transferring the data from the FIFO to the system memory as soon as the programmed
RX_WMark level is attained. At the end of a successful boot data transfer from the card, the following
interrupts are generated:
Command Done (CD) with the MSI_ISTAT.CMDDONE bit
26–46
MSI_FIFOTH
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register. Typically, the threshold value can

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