Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 81

Chapter 1
Overview
This chapter provides an overview of the MPC8313E PowerQUICC™ II Pro processor features, including
a block diagram showing the major functional components. The MPC8313E is a cost-effective,
low-power, highly integrated host processor that addresses the requirements of several printing and
imaging, consumer, and industrial applications, including main CPUs and I/O processors in printing
systems, networking switches and line cards, wireless LANs (WLANs), network access servers (NAS),
VPN routers, intelligent NIC, and industrial controllers. The MPC8313E extends the PowerQUICC
family, adding higher CPU performance, additional functionality, and faster interfaces while addressing
the requirements related to time-to-market, price, power consumption, and package size. This manual is
written from the perspective of the MPC8313E, and unless otherwise noted, the information applies also
to the MPC8313. Note that the MPC8313 does not support a security engine. The MPC8313E contains an
embedded PowerPC™ e300c3 core built on Power Architecture ™ technology.
1.1 MPC8313E PowerQUICC II Pro Processor Overview
Figure 1-1 shows the major functional units within the MPC8313E. The e300c3 core in the MPC8313E,
with its 16 Kbytes of instruction and 16 Kbytes of data cache, implements the PowerPC user instruction set
architecture and provides hardware and software debugging support. In addition, the MPC8313E offers dual
three-speed 10, 100, and 1000 Mbps Ethernet controllers (eTSECs), a DDR1/DDR2 SDRAM memory
controller, an enhanced local bus controller (eLBC), a 32-bit PCI-2.3 controller, a dedicated security engine,
a programmable interrupt controller, dual I
I/O port, and a USB 2.0 host and device controller with an on-chip high-speed USB 2.0 PHY. The high level
of integration in the MPC8313E helps simplify board design and offers significant bandwidth and
performance.
DUART
Dual I2C
Timers
GPIO
SPI
I/O Sequencer
(IOS)
PCI DMA
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
2
C controllers, a 4-channel DMA controller, a general-purpose
e300c3 Core with FPU and
Power Management
Interrupt
16-KB
I-Cache
Controller
Security Engine 2.2
Figure 1-1. MPC8313E Block Diagram
16-KB
Enhanced
D-Cache
USB 2.0 HS
eTSEC
Host/Device/OTG
SGMII
On-Chip
ULPI
HS PHY
Note: The MPC8313 does not include a
security engine.
DDR1/DDR2
Local Bus
Controller
eTSEC
SGMII
1-1