Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 182

Reset, Clocking, and Initialization
Table 4-11. Reset Configuration Word High Bit Settings (continued)
Bits Name
12–13 RLEXT Boot ROM location extension.
This bit combined with bit ROMLOC determines where the device boots from. See
"Boot ROM Location,"
00 Legacy mode—allows for booting from on-chip peripherals. Refer to
01 NAND Flash mode—allows for booting from NAND flash devices. Refer to
10 Reserved
11 Reserved
14–15 — Reserved, should be cleared.
16–18 TSEC1M TSEC1 mode.
See
19–21 TSEC2M TSEC2 mode.
See
22–27 — Reserved, should be cleared.
28 TLE True little-endian. See
29 LALE Local bus LALE signal timing. See
30–31 — Reserved, should be cleared.
4.3.2.2.1 PCI Host/Agent Configuration
The PCIHOST configuration parameter, shown in
or as a PCI agent device. In host mode, the device can immediately master transactions to the PCI interface.
If the device is a PCI agent device, the device is disabled from mastering PCI transactions until the external
host enables it to do so. The external host does this by setting the control registers of the device's interfaces
appropriately. See details in the PCI programming model described in
Map/Register Definitions."
RCWHR Bit Field Name
0 PCIHOST
If the device is a PCI agent, and the e300 core is not in holdoff mode (as
described in
(RCWHR)"), the boot ROM should not be located on the PCI interface
because the device is not enabled to master reads onto the PCI bus.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
4-16
for more information.
information.
information.
Section 4.3.2.2.5, "eTSEC1 Mode,"
Section 4.3.2.2.6, "eTSEC2 Mode,"
Section 4.3.2.2.7, "e300 Core True Little-Endian,"
Table 4-12. PCI Host/Agent Configuration
Value
(Binary)
0 The device acts as a PCI agent device.
1 The device acts as the host processor (default).
Section 4.3.2.2, "Reset Configuration Word High Register
Description
for more information.
for more information.
Section 4.3.2.2.8, "LALE Configuration,"
Table 4-12, configures the device to act as a PCI host
Section 13.3, "Memory
Meaning
NOTE
Section 4.3.2.2.4,
Table 4-15 for more
Table 4-15 for more
for more information.
for more information.
Freescale Semiconductor