Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 449

Chapter 10
Enhanced Local Bus Controller
This chapter describes the enhanced local bus controller (eLBC) block. It describes the external signals
and the memory-mapped registers as well as a functional description of the general-purpose chip-select
machine (GPCM), NAND Flash control machine (FCM), and user-programmable machines (UPMs) of the
eLBC. Finally, it includes an initialization and applications information section with many specific
examples of its use.
10.1 Introduction
Figure 10-1 is a functional block diagram of the eLBC, which supports three interfaces: GPCM, FCM, and
UPM controllers.
Timers/
Counters
Memory
Banks and
Compare
Local Address
Local Data
Transfer Acknowledge
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Config
UPM
Regs
CTRL
Refresh
FCM
CTRL
Local
Memory
GPCM
Controller
Clock
Divider
Address and
Data Machine
Figure 10-1. Enhanced Local Bus Controller Block Diagram
UPM
RAM
FCM
RAM
LCS[0:3]
LBCTL
UPM CTRL
LGPL[0:3]
LGPL4/LUPWAIT
LGPL5
LBS[0:1]
FCM CTRL
LFCLE
LFALE
LFWE
LFRE
LFWP
LFRB
GPCM CTRL
LOE
LGTA
LWE[0:1]
LA[0:25]
LALE
LPBSE
LDVAL
LSRCID[0:4]
LAD[0:15]
LCLK[0:1]
10-1