Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 691

0
Field
Reset
R/W
Addr
14.4.3.9 AESU Context Registers
There are seven 64-bit context data registers that allow the host to read/write the contents of the context
used to process the message. The context must be written prior to the key data. If the context registers are
written during message processing, a context error will be generated. All context registers are cleared
when a hard/soft reset or initialization is performed.
The context registers must be read when changing context and restored to their original values to resume
processing an interrupted message (CBC, CTR, and CCM modes). For CTR and CCM mode, all seven
64-bit context registers must be read to retrieve context, and all seven must be written back to restore
context. Effectively, the user must read the four empty 'place holder' context registers in addition to the
three context registers holding the Counter and Counter Modulus Exponent when in CTR mode. The
contents of the 'empty' context registers need not be preserved, but when restoring the CTR mode context,
the 'empty' registers must be filled with 32 bytes of zeros before writing the saved Counter and Counter
Modulus Exponent.
Context should be loaded with the lower bytes in the lowest 64-bit context register. The context registers
are summarized in Figure
Cipher Mode
1
ECB —
1
CBC IV1
CTR —
SRT Counter
1
CCM IV
1
Must be written at the start of a new message.
2
Must be written at start of new CCM decryption.
3
Header size/MAC size is only used if AES-CCM processing is suspended and resumed.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Figure 14-33. AESU End-of-Message Register (AESUEMR)
14-34.
2 3
— —
1
IV2 —
— —
1
Counter Modulus
Exponent (M)
/ MAC Tag Encrypted MAC
MAC/Encrypted Counter
Figure 14-34. AESU Context Registers
AESU End of Message
0
W
AESU 0x3_4050
Context Register (64 bits each)
4
—
—
—
—
1
2
/Decrypted
Security Engine (SEC) 2.2
5 6
— —
— —
1
Counter Counter Modulus
Exponent
— —
1
Counter Counter Modulus
Exponent
size/MAC size
63
7
—
—
1
—
1
/header
3
14-49