Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 282

System Configuration
5.8.3.2 Shutting Down Unused Blocks
As described in Section 4.5.2.3, "System Clock Control Register (SCCR),"
down certain functional blocks within the device when they are not needed in a particular system. SCCR
can be written by the PowerPC core or by an external master. Powering down a block in this way turns off
all clocks to that block. It does not remove power. It is required that the SCCR is written to shut down a
certain functional block only when that block is idle.
Functional blocks disabled using SCCR cannot respond to configuration
accesses. Any access to configuration, control, and status registers of a
disabled block is a programming error.
5.8.3.3 Software-Controlled Power-Down States
PowerPC software can place the core in doze, nap, or sleep power-down states by writing to HID0 in the
core, as described in detail in the section "Hardware Implementation Register 0 (HID0)," of the e300
PowerPC Core Reference Manual. In addition, if PMCCR[SLPEN] is set when the PowerPC core request
to enter nap or sleep modes, it will also cause the system internal logic units to enter low power mode.
5.8.3.4 Software-Controlled Power Supply Switching
The device has additional low power features that allow power to be removed to a portion of the die,
allowing significant additional power savings. This mode is referred to as D3Warm (described below).
Figure 5-56 illustrates the power segmentation provided on the device. Sequencing in and out of D3Warm
will be described in the following sections.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
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NOTE
SCCR provides a way to shut
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