Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 586

PCI Bus Interface
memory-mapped registers until inbound address translation is enabled. In agent mode, configuration
cycles are acknowledged if CFG_LOCK is 0 (see
Register"), either from reset configuration or after being cleared by software.
13.1.2.2 PCI Arbiter Configuration
The interface can be configured to use an on-chip or off-chip PCI arbiter. Arbitration for PCI is determined
by the value in RCWH[PCIARB].
(RCWHR)," for more information.
13.2 External Signal Description
Table 13-2 shows the properties of the PCI signals.
Name
CPCI_HS_ENUM
CPCI_HS_ES
CPCI_HS_LED
PCI_AD[31:0]
PCI_C/BE[3:0]
PCI_DEVSEL
PCI_FRAME
PCI_REQ[0:2]
PCI_GNT[0:2]
PCI_IDSEL
PCI_INTA
PCI_IRDY
PCI_PAR
PCI_PERR
PCI_RESET_OUT
PCI_SERR
PCI_STOP
PCI_TRDY
PCI_PME
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
13-4
SeeSection 4.3.2.2, "Reset Configuration Word High Register
Table 13-2. Signal Properties
Function
CompactPCI hot swap enumerator
CompactPCI hot swap ejector switch
CompactPCI hot swap LED
PCI n address / data
PCI bus command / byte enable
PCI device select
PCI cycle frame
PCI arbiter requests
PCI arbiter grants
PCI initialization device select
PCI interrupt A
PCI initiator ready
PCI parity
PCI parity error
PCI reset output
PCI system error
PCI stop
PCI target ready
PCI PME assertion request
Section 13.3.3.24, "PCI Function Configuration
Reset State
High impedance
—
Asserted
High impedance
High impedance
High impedance
High impedance
Configuration-dependent
Configuration-dependent
—
High impedance
High impedance
High impedance
High impedance
Asserted
High impedance
High impedance
High impedance
High impedance
Pull Up
Required
—
—
—
—
Required
Required
Required on inputs
—
—
Required
Required
—
Required
Required
Required
Required
Required
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