Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 299

System Configuration
5.8.3.7.4 Low-Power Considerations
The following should be considered in a low-power system implementation.
PME Generation
If the host wants PCI_PME to be asserted it must make sure both the PMCCR1[PME_EN] and the
PCIPMR1[PME_EN] bits are set to 1.
If the external host does not want PCI_PME to be asserted it can set PCIPMR1[PME_EN] to 0. However
if the PMCCR1[PME_EN] is set to 1, the PMC will assume PME signaling. If a wake-up event occurs
PMC will assume PCI_PME will be asserted and that the host will respond requesting it to change its
power state. If PCIPMR1[PME_EN] = 0, PCI_PME will not be asserted and the host will never know a
wake-up event has occurred. In this case the host can still wake-up the device by writing a new power state
in the PCIPMR1[Power_State] field, but it will never know about the device wake-up event.
The PCIPMR1[PME_EN] in the PCI configuration space will default to 0 (per spec). The
PMCCR1[PME_EN] in the PMC block also defaults to 0. If there is no PCI host in the system, PCI_PME
generation will most likely not be required. However if PCI_PME assertion is desired on wake-up for some
reason, the e300 can assert the two PME_EN's and still generate PCI_PME.
If PMCCR1[PME_EN] = 1 the implication is that the device is an agent and PCI_PME is not a wake-up
event. If PMCCR1[PME_EN] = 0 the implication is that the device is the host and will wake up directly
without PCI_PME signaling.
The device has the ability to assert PCI_PME under software control. The e300 can write
PMCCR1[ASSERT_PME] = 1 and PCI_PME will be asserted (assuming PCIPMR1[PME_EN] = 1).
This capability is provided to support PCI protocol when waking up from D1, D2 or D3Hot when the
cause of the wake-up is not a defined wake-up event. In this case the e300 will wake-up or return to D0
when an interrupt is asserted or there is CSB bus activity independent of PMC. Software can manually
assert PCI_PME is this way to inform the host that a power state change has occurred.
If when waking up from D1–D3Hot the wake-up event is a defined wake-up event, it will be registered in
the PMCER register. When the event occurs, if the interrupt to the e300 is enabled, an interrupt will be
asserted and e300 will wake-up directly. If PMCCR1[PME_EN] and PCIPMR1[PME_EN] are both set,
the device will assert PCI_PME. In this case the software on the e300 may be written such that when it
wakes up due to the PMC interrupt it waits until the host request that it go to D0 before continuing opera-
tion so that it follows PCI protocol.
If multiple wake-up events occur before the device is instructed to go to D0, multiple PCI_PME assertions
will occur. All interrupt sources will be stored in the PMCER until cleared. As an agent
(PMCCR1[PME_EN] = 1), a wake-up interrupt will not be asserted to the e300 until the host has instructed
the device to wake-up by writing D0 into the PCIPMR1[Power_State] field. As a host
(PMCCR1[PME_EN] = 0) the interrupt will be asserted to the e300 as soon as the wake-up event occurs.
The PMCCR1[USE_STATE] bit is there to tell the PMC not to respond to differences between the
next_state and current_state values. This is mainly to prevent PMC from waking up in Host mode if there
are inadvertent changes made to the PCIPMCR1[Power_State] register.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor 5-91