Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 191

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ACS
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4.3.3.2.4 Reset Configuration Load Fail
Failure of reset configuration load by the I
2
structure or I C bus problem. If a reset configuration load failure occurs, due to preamble fail or any other
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
1 2 3
0 1 0
1 0 1
0 1 0
1 1 1
RCWLR ADDR[14–21]
RCWLR ADDR[22–29]
Reset configuration word low [0–7]
Reset configuration word low [8–15]
Reset configuration word low [16–23]
Reset configuration word low [24–31]
1 1 1
RCWHR ADDR[14–21]
RCWHR ADDR[22–29]
Reset configuration word high [0–7]
Reset configuration word high [8–15]
Reset configuration word high [16–23]
Reset configuration word high [24–31]
*
BYTE_EN
ADDR[14–21]
ADDR[22–29]
DATA[0–7]
DATA[8–15]
DATA[16–23]
DATA[24–31]
0 0 0
0 0 0
0 0 0
CRC[0–7]
CRC[8–15]
CRC[16–23]
CRC[24–31]
Figure 4-6. EEPROM Contents
2
C boot sequencer can be caused by an incorrect EEPROM data
4 5 6
1 0 1
0 1 0
1 0 1
1 1 RCWLR
ADDR[12:13]
1 1 RCWHR
ADDR[12:13]
1 ADDR[12–13]
0 0 0
0 0 0
0 0 0
Reset, Clocking, and Initialization
7
0 Preamble
1
0
Reset configuration
word low
preload command
Reset configuration
word high
preload command
Last configuration
preload command
0
End command
0
0
Cyclic redundancy
check
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