Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 761

15.5.3.2.5 Transmit Queue Control Register (TQUEUE)
The TQUEUE register, shown in
TxBD ring 0 is enabled.
Offset eTSEC1:0x2_4114; eTSEC2:0x2_5114
0
R
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 15-19 describes the TQUEUE register.
\
Bits Name
0–15 — Reserved
16 EN0 Transmit queue 0 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
17 EN1 Transmit queue 1 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
18 EN2 Transmit queue 2 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
19 EN3 Transmit queue 3 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
20 EN4 Transmit queue 4 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
21 EN5 Transmit queue 5 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
22 EN6 Transmit queue 6 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
23 EN7 Transmit queue 7 enable.
0 TxBD ring is not queried for transmission. In effect the transmit queue is disabled.
1 TxBD ring is queried for transmission.
24–31 — Reserved
15.5.3.2.6 TxBD Ring 0–3 Weighting Register (TR03WT)
When modified weighted round-robin Tx scheduling is enabled (TCTRL[TXSCHED] = 10), this register
determines the weighting applied to each transmit queue for queues 0 to 3. For priority-based scheduling,
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Figure 15-14, selectively enables each of the TxBD rings 0–7. By default,
15
—
Figure 15-14. TQUEUE Register Definition
Table 15-19. TQUEUE Field Descriptions
Enhanced Three-Speed Ethernet Controllers
16 17 18 19 20
EN0 EN1 EN2 EN3 EN4 EN5 EN6 EN7
1 0 0 0 0
Description
Access: Read/Write
21 22 23 24
—
0 0 0 0 0 0 0 0 0 0 0
31
15-43