Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 71

Table
Number
18-5 UTHR Field Descriptions ..................................................................................................... 18-6
18-6 UDMB Field Descriptions .................................................................................................... 18-7
18-7 UDLB Field Descriptions ..................................................................................................... 18-7
18-8 Baud Rate Examples ............................................................................................................. 18-7
18-9 UIER Field Descriptions ....................................................................................................... 18-9
18-10 UIIR Field Descriptions ...................................................................................................... 18-10
18-11 UIIR IID Bits Summary...................................................................................................... 18-10
18-12 UFCR Field Descriptions.................................................................................................... 18-11
18-13 ULCR Field Descriptions.................................................................................................... 18-12
18-14 Parity Selection Using ULCR[PEN], ULCR[SP], and ULCR[EPS] .................................. 18-13
18-15 UMCR Field Descriptions .................................................................................................. 18-13
18-16 ULSR Field Descriptions .................................................................................................... 18-14
18-17 UMSR Field Descriptions................................................................................................... 18-15
18-18 USCR Field Descriptions.................................................................................................... 18-16
18-19 UAFR Field Descriptions.................................................................................................... 18-16
18-20 UDSR Field Descriptions.................................................................................................... 18-17
18-21 UDSR[TXRDY] Set Conditions ......................................................................................... 18-17
18-22 UDSR[TXRDY] Cleared Conditions.................................................................................. 18-17
18-23 UDSR[RXRDY] Set Conditions......................................................................................... 18-18
18-24 UDSR[RXRDY] Cleared .................................................................................................... 18-18
19-1 Signal Properties ................................................................................................................... 19-7
19-2 Detailed Signal Descriptions................................................................................................. 19-7
19-3 SPI Register Summary .......................................................................................................... 19-9
19-4 SPMODE Field Descriptions ................................................................................................ 19-9
19-5 SPIE Field Descriptions ...................................................................................................... 19-12
19-6 SPIM Field Descriptions ..................................................................................................... 19-13
19-7 SPCOM Field Descriptions................................................................................................. 19-14
19-8 SPI Transmit Data Hold Field Descriptions........................................................................ 19-14
19-9 SPI Receive Data Hold Field Descriptions ......................................................................... 19-15
20-1 JTAG Test Signals Summary ................................................................................................ 20-2
20-2 JTAG Test—Detailed Signal Descriptions............................................................................ 20-2
21-1 IPIC External Signals—Detailed Signal Descriptions.......................................................... 21-2
21-2 GPIO Register Address Map................................................................................................. 21-2
21-3 GPDIR Bit Settings ............................................................................................................... 21-3
21-4 GPODR Bit Settings ............................................................................................................. 21-3
21-5 GPnDAT Bit Settings ............................................................................................................ 21-4
21-6 GPIER Bit Settings ............................................................................................................... 21-4
21-7 GPIMR Bit Settings .............................................................................................................. 21-5
21-8 GPICR Bit Settings ............................................................................................................... 21-5
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Tables
Tables
Title
Page
Number
lxxi