Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 543

conclusion of the sequence, eLBC will issue a command complete interrupt (LTESR[CC]) if interrupts are
enabled. MDR[AS3–AS0] then can be read to obtain the first 4 bytes of NAND Flash ID.
Table 10-46. FCM Register Settings for ID Read (OR n [PGS] = 1)
Register
FCR
FBAR
FPAR
FBCR
MDR
FIR
10.5.4.4 NAND Flash Page Read Command Sequence Example
An example of configuring FCM to execute a random page read command to large-page NAND Flash is
shown in Table 10-47. This sequence reads an entire page (main and spare region) into the shared FCM
buffer RAM, checking ECC as it proceeds. The sequence is initiated by writing FMR[OP] = 10, and
issuing a special operation to the bank. A few cycles before completion itself, FECCn gets updated with
the ECC bytes for the main region validated by FECCn[0]. At the conclusion of the sequence, eLBC will
issue a command complete interrupt (LTESR[CC]) if interrupts are enabled. Once the sequence has
completed, the shared buffer (buffer 1 for page index 5) and transfer error registers (LTECCR that reports
the 512 blocks with unibit /multibit errors if any) are valid.
Table 10-47. FCM Register Settings for Page Read (OR n [PGS] = 1)
Register
FCR
FBAR
(e.g. block 0x00010ab4)
FPAR
locates page 5, buffer 1)
FBCR
MDR
FIR
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Initial Contents
0x90000000 CMD0 = 0x90 = read ID command; other commands unused
— unused
— unused
— unused
0x00000000 AS0 = 0x00 = dummy address for read ID command;
AS0–AS3 return with first 4 bytes of ID code
0x43BBBBB0 OP0 = CM0 = command 0;
OP1 = UA = user address from MDR;
OP2–OP6 = RS = read 4 bytes ID into MDR[AS3–AS0];
OP7 = NOP
Initial Contents
0x00300000 CMD0 = 0x00 = random read address entry;
CMD1 = 0x30 = read page
block index BLK locates index of 128-Kbyte block
page offset PI locates page index in BLK;
(e.g. 0x00005000 PI mod 2 indexes FCM buffer RAM;
MS = 0 and CI = 0
0x00000000 BC = 0 to read entire 2112-byte page with ECC check
— unused
0x4125E000 OP0 = CM0 = command 0;
OP1 = CA = column address;
OP2 = PA = page address;
OP3 = CM1 = command 1;
OP4 = RBW = wait on Flash ready and read data into FCM buffer;
OP5–OP7 = NOP
Enhanced Local Bus Controller
Description
Description
10-95