Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 133

Offset
0x3_2400 DEUK1—DEU key 1 register
0x3_2408 DEUK2—DEU key 2 register
0x3_2410 DEUK3—DEU key 3 register
0x3_2800– DEU FIFO
0x3_2FFF
0x3_4000 AESUMR—AESU mode register
0x3_4008 AESUKSR—AESU key size register
0x3_4010 AESUDSR—AESU data size register
0x3_4018 AESURCR—AESU reset control register
0x3_4028 AESUSR—AESU status register
0x3_4030 AESUISR—AESU interrupt status register
0x3_4038 AESUICR—AESU interrupt control register
0x3_4050 AESUEMR—AESU end-of-message register
0x3_4100 AESU context memory registers
0x3_4400– AESU key memory
0x3_4408
0x3_4800– AESU FIFO
0x3_4FFF
0x3_6000 MDEUMR—MDEU mode register
0x3_6008 MDEUKSR—MDEU key size register
0x3_6010 MDEUDSR—MDEU data size register
0x3_6018 MDEURCR—MDEU reset control register
0x3_6028 MDEUSR—MDEU status register
0x3_6030 MDEUISR—MDEU interrupt status register
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 2-2. Memory Map (continued)
Register
Advanced Encryption Standard Execution Unit (AESU)
Message Digest Execution Unit (MDEU)
Access Reset
W —
W —
W —
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R 0x0000_0000
_0000_0000
R 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_1000
W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R/W 0x0000_0000
_0000_0000
R 0x0000_0000
_0000_0000
R 0x0000_0000
_0000_0000
Memory Map
Section/Page
14.4.1.10/14-28
14.4.1.10/14-28
14.4.1.10/14-28
14.4.1.11/14-28
14.4.3.1/14-40
14.4.3.2/14-42
14.4.3.3/14-43
14.4.3.4/14-43
14.4.3.5/14-44
14.4.3.6/14-45
14.4.3.7/14-47
14.4.3.8/14-48
14.4.3.9/14-49
14.4.2.1/14-28
14.4.2.3/14-32
14.4.2.4/14-32
14.4.2.5/14-33
14.4.2.6/14-34
14.4.2.7/14-35
2-29