Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 307

6.2.3 Arbiter Event Register (AER)
The arbiter uses arbiter event register (AER) to report on erroneous transactions. This register is cleared
by writing ones to the fields to be cleared.
Offset 0x0C
0
R
W
Reset
Table 6-4 describes AER fields.
Bits Name
0–25 — Write reserved, read = 0
26 ETEA Transfer error.Reports on detection of transfer error by one of the slaves.
0 No transfer error detected by one of the slaves.
1 Transfer error detected by one of the slaves.
27 RES Reserved transfer type. Reports on transaction with reserved transfer type. See
"Reserved Transaction Type,"
0 No transaction with reserved transfer type occurred.
1 Transaction with reserved transfer type occurred.
28 ECW External control word transfer type. Reports on transaction with external control word transfer type. See
Section 6.3.2.6, "Illegal (eciwx/ecowx) Transaction Type,"
0 No transaction with external control word transfer type occurred.
1 Transaction with external control word transfer type occurred.
29 AO Address Only transfer type. Reports on transaction with address only transfer type. See
"Address Only Transaction Type,"
0 No transaction with address only transfer type occurred.
1 Transaction with address only transfer type occurred.
30 DTO Data time out. Reports on data tenure time out.
0 Data time out timer is not expired.
1 Data time out timer is expired.
31 ATO Address time out. Reports on address tenure time out.
0 Address time out timer is not expired.
1 Address time out timer is expired.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Figure 6-3 shows the fields of AER.
—
All zeros
Figure 6-3. Arbiter Event Register (AER)
Table 6-4. AER Field Descriptions
for more information.
for more information.
25 26
ETEA RES ECW AO DTO ATO
w1c
Description
for more information.
Arbiter and Bus Monitor
Access: User w1c
27 28 29 30 31
w1c w1c w1c w1c w1c
Section 6.3.2.5,
Section 6.3.2.4,
6-5