Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 219

5.2.4.6 PCI Local Access Window n Attributes Registers
(PCILAWAR0–PCILAWAR1)
The PCI local access window n attributes registers (PCILAWAR0–PCILAWAR1) are shown in
Offset 0x64
0x6C
0 1
R
EN
W
Reset
1
The reset value of PCILAWAR0[EN] depends on RCWH[RLEXT] and RCWH[ROMLOC]. See
"PCILAWAR0[EN] and PCILAWAR0[SIZE] Reset Value,"
2
The reset value of PCILAWAR0[SIZE] is always 0b010110, meaning an 8-Mbyte local access window. See
Section 5.2.4.6.1, "PCILAWAR0[EN] and PCILAWAR0[SIZE] Reset Value,"
Figure 5-7. PCI Local Access Window n Attributes Registers (PCILAWAR0–PCILAWAR1)
Table 5-13 defines the bit fields of PCILAWAR0–PCILAWAR1.
'
Bits Name
0 The PCI local access window n is disabled.
0 EN
1 The PCI local access window n is enabled and other PCILAWAR n and PCILAWBAR n fields combine to
identify an address range for this window.
1–25 — Reserved. Write has no effect, read returns 0.
26–31 SIZE Identifies the size of the window from the starting address. Window size is 2
000000–001010 Reserved. Window is undefined.
001011 4 Kbytes
001100 8 Kbytes
001101 16 Kbytes
. . . . . . . 2
011110 2 Gbytes
011111–111111 Reserved. Window is undefined.
5.2.4.6.1 PCILAWAR0[EN] and PCILAWAR0[SIZE] Reset Value
The core may use a PCI peripheral device to fetch its boot vector. For this purpose an 8-Mbyte (2
local access window is defined by the PCILAWBAR0[SIZE] reset value, and PCILAWAR0 is enabled
according to the value set in the reset configuration word high ROMLOC and RLEXT fields.
Table 5-14 defines the reset value of PCILAWAR0[EN].
'
RCWHR[RLEXT]/RCWHR
[ROMLOC]
000, 011–111
001
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 5-13. PCILAWAR0–PCILAWAR1 Bit Settings
(SIZE+1)
bytes
Table 5-14. PCILAWAR0[EN] Reset Value
PCILAWR0[EN]
Reset Value
0 e300c3 core boot not performed from a PCI device.
1 e300c3 core boot performed from a PCI device. PCI 8-Mbyte (2
access window is enabled.
—
1,2
All zeros
for a detailed description.
Description
Description
System Configuration
Access: Read/Write
25 26
SIZE
Section 5.2.4.6.1,
for a detailed description
(SIZE+1)
bytes.
Figure 5-7.
31
(22+1)
)
(22+1)
) local
5-11