Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 115

Offset
2
0x0_3110 I2C2DR—I
0x0_3114 I2C2DFSRR—I
0x0_311C– Reserved, should be cleared
0x0_31FF
0x0_4500 URBR—ULCR[DLAB] = 0 UART1 receiver buffer register
UTHR—ULCR[DLAB] = 0 UART1 transmitter holding
register
UDLB—ULCR[DLAB] = 1 UART1 divisor least significant
byte register
0x0_4501 UIER—ULCR[DLAB] = 0 UART1 interrupt enable register
UDMB—ULCR[DLAB] = 1 UART1 divisor most significant
byte register
0x0_4502 UIIR—ULCR[DLAB] = 0 UART1 interrupt ID register
UFCR—ULCR[DLAB] = 0 UART1 FIFO control register
UAFR—ULCR[DLAB] = 1 UART1 alternate function
register
0x0_4503 ULCR—ULCR[DLAB] = x UART1 line control register
0x0_4504 UMCR—ULCR[DLAB] = x UART1 MODEM control register
0x0_4505 ULSR—ULCR[DLAB] = x UART1 line status register
0x0_4506 UMSR—ULCR[DLAB] = x UART1 MODEM status register
0x0_4507 USCR—ULCR[DLAB] = x UART1 scratch register
0x0_4510 UDSR—ULCR[DLAB] = x UART1 DMA status register
0x0_4600 URBR—ULCR[DLAB] = 0 UART2 receiver buffer register
UTHR—ULCR[DLAB] = 0 UART2 transmitter holding
register
UDLB—ULCR[DLAB] = 1 UART2 divisor least significant
byte register
0x0_4601 UIER—ULCR[DLAB] = 0 UART2 interrupt enable register
UDMB—ULCR[DLAB] = 1 UART2 divisor most significant
byte register
0x0_4602 UIIR—ULCR[DLAB] = 0 UART2 interrupt ID register
UFCR—ULCR[DLAB] = 0 UART2 FIFO control register
UAFR—ULCR[DLAB] = 1 UART2 alternate function
register
0x0_4603 ULCR—ULCR[DLAB] = x UART2 line control register
0x0_4604 UMCR—ULCR[DLAB] = x UART2 MODEM control register
0x0_4605 ULSR—ULCR[DLAB] = x UART2 line status register
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 2-2. Memory Map (continued)
Register
C2 data register
2
C2 digital filter sampling rate register
Access
R/W
R/W
—
DUART
R
W
R/W
R/W
R/W
R
W
R/W
R/W
R/W
R
R
R/W
R
R
W
R/W
R/W
R/W
R
W
R/W
R/W
R/W
R
Memory Map
Reset Section/Page
0x00 17.3.1.5/17-9
0x10 17.3.1.6/17-9
— —
0x00 18.3.1.1/18-5
0x00 18.3.1.2/18-6
0x00 18.3.1.3/18-6
0x00 18.3.1.4/18-8
0x00 18.3.1.3/18-6
0x01 18.3.1.5/18-9
0x00 18.3.1.6/18-10
0x00 18.3.1.12/18-16
0x00 18.3.1.7/18-11
0x00 18.3.1.8/18-13
0x60 18.3.1.9/18-14
0x00 18.3.1.10/18-15
0x00 18.3.1.11/18-16
0x01 18.3.1.13/18-17
0x00 18.3.1.1/18-5
0x00 18.3.1.2/18-6
0x00 18.3.1.3/18-6
0x00 18.3.1.4/18-8
0x00 18.3.1.3/18-6
0x01 18.3.1.5/18-9
0x00 18.3.1.6/18-10
0x00 18.3.1.12/18-16
0x00 18.3.1.7/18-11
0x00 18.3.1.8/18-13
0x60 18.3.1.9/18-14
2-11