Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 961

Bits Name
19 BSVIS B session valid interrupt status. Set when VBus has either risen above or fallen below the B session valid
threshold (0.8 VDC).
Software must write a one to clear this bit.
18 ASVIS A session valid interrupt status. Set when VBus has either risen above or fallen below the A session valid
threshold (0.8 VDC).
Software must write a one to clear this bit.
17 AVVIS A VBus valid interrupt status. Set when VBus has either risen above or fallen below the VBus valid threshold
(4.4 VDC) on an A device.
Software must write a one to clear this bit.
16 IDIS USB ID interrupt status. Set when a change on the ID input has been detected.
Software must write a one to clear this bit.
15 — Reserved, should be cleared.
14 DPS Data bus pulsing status
1 Pulsing detected on port
0 No pulsing on port
13 1msT 1 millisecond timer toggle. This bit toggles once per millisecond.
12 BSE B session end
1 VBus is below the B session end threshold.
0 VBus is above the B session end threshold.
11 BSV B session valid
1 VBus is above the B session valid threshold.
0 VBus is below the B session valid threshold.
10 ASV A session valid
1 VBus is above the A session valid threshold.
0 VBus is below the A session valid threshold.
9 AVV A VBus valid
1 VBus is above the A VBus valid threshold.
0 VBus is below the A VBus valid threshold.
8 ID USB ID
1 B device
0 A device
7–5 — Reserved, writes should preserve reset value.
4 DP Data pulsing
1 The pullup on DP is asserted for data pulsing during SRP.
0 The pullup on DP is not asserted.
3 OT OTG termination. This bit must be set when the OTG device is in device mode.
1 Enable pulldown on DM
0 Disable pulldown on DM
2 — Reserved, should be cleared.
1 VC VBUS charge. Setting this bit causes the VBus line to be charged. This is used for VBus pulsing during SRP.
0 VD VBUS discharge. Setting this bit causes VBus to discharge through a resistor.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 16-24. OTGSC Register Field Descriptions (continued)
Description
Universal Serial Bus Interface
16-33