Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 533

Table 10-42 shows how the RAM word AMX bits and M
column address multiplexing on the LA[10:25] signals.
msb
0 1 2
AMX = 10
MxMR[AM] = 000
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 001
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 010
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 011
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 100
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 101
(Row)
AMX = 00
(Col)
AMX = 10
MxMR[AM] = 110
AMX = 10
MxMR[AM] = 111
Note that any change to the AMX field from one RAM word to the next RAM word executed results in an
address phase on the {LAD
in the OR and LCRR registers. The LGPL[0:5] signals maintain the value specified in the RAM word
n
during the LALE phase.
AMX must not change values in any RAM word which begins a loop.
10.4.4.4.8 Data Valid and Data Sample Control (UTA)
When a read access is handled by the UPM, and the UTA bit is 1 (data is to be sampled by the eLBC), the
value of the DLT3 bit in the same RAM word, in conjunction with M
data input is sampled by the eLBC as follows:
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 10-42. UPM Address Multiplexing
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
LAD
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
, LA } bus with the assertion of LALE for the number of cycles set for LALE
n n
MR[AM] settings can be used to affect row ×
x
Internal Transaction Address
LA
LA
LA
LA
LA
14
LA
LAD
13 14
Reserved
Reserved
NOTE
MR[GPL4], determines when the
x
Enhanced Local Bus Controller
21 22 23 24 25 26 27 28 29 30
23 24 25
LA
18 19 20 21 22 23 24
24 25
LA
17 18 19 20 21 22 23 24
25
LA
16 17 18 19 20 21 22 23 24
LAD LA
15 16 17 18 19 20 21 22 23 24
LAD LA
15 16 17 18 19 20 21 22 23 24
LA
15 16 17 18 19 20 21 22 23 24
lsb
31
25
25
25
25
25
25
10-85