Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 583

Chapter 13
PCI Bus Interface
The PCI interface is compatible with the PCI Local Bus Specification, Rev. 2.3. It is beyond the scope of
this manual to document the intricacies of PCI. This chapter describes the PCI controller and provides a
basic description of the PCI bus operations. The specific emphasis is directed at how this device
implements the PCI specification. Designers of systems incorporating PCI devices should refer to the
respective specifications for a thorough description of the PCI buses.
Much of the available PCI literature refers to a 16-bit quantity as a WORD
and a 32-bit quantity as a DWORD. Because this is inconsistent with the
terminology in this manual, the terms 'word' and 'double word' are not used
in this chapter. Instead, the number of bits or bytes indicates the exact
quantity.
13.1 Introduction
The PCI controller acts as a bridge between the PCI interface and the CSB. The I/O sequencer buffers the
data. Figure 13-1 is a high-level block diagram of the PCI controller.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
NOTE
13-1