Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 884

Enhanced Three-Speed Ethernet Controllers
— JUMBO and SNAP header
— IPV4
— IPV6
— VLAN
— MPLSU/MPLSM
— PPPOES
— ARP
For stack L2 (that is, more than one ethertypes) header, the Ethernet parser traverses through the header
until it finds the last valid ethertype or the ethertype is unsupported. Below is a description of what the
Ethernet header parser recognizes for stack L2 header.
Column—Current L2
Ethertype
Row—Next Supported L2
Ethertype
LLC/SNAP
JUMBO/SNAP
IPV4
IPV6
VLAN
MPLSU
MPLSM
PPOES
ARP
Note: * means that it is the next protocol
The L3 parser is enabled by RCTRL[PRSDEP] = 10 or 11. It begins when the Ethernet parser ends and a
valid IPv4/v6 ethertype is found. The L4 header is enabled by RCTRL[PRSDEP] = 11. It begins when the
L3 parser ends and a valid TCP/UDP next protocol is found and no fragment frame is found. The primary
functionalities of L3(IPv4/6) and L4(TCP/UDP) parsers are as follows:
• IP recognition (v4/v6, ARP, encapsulated protocol)
• IP header checksum verification
• IPv4/6 over IPv4/6 (tunneling)—parse headers and find layer 4 protocol
• IP layer 4 protocol/next header extraction
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
15-166
Table 15-154. Supported Stack L2 Ethernet Headers
LLC/ JUMBO/
IPV4
SNAP SNAP
N N Y
N N Y
N N N
N N N
Y Y Y
N N Y*
N N Y*
N N Y
N N N
IPV6 VLAN MPLSU
Y Y Y
Y Y Y
N N N
N N N
Y Y Y
Y* N y
Y* N Y
Y N Y
N N N
MPLSM PPOES ARP
Y Y Y
Y Y Y
N N N
N N N
Y Y Y
Y N N
Y N N
Y N N
N N N
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