Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 260

System Configuration
5.7.3.4 Capture Modes
Each timer has a 16-bit field in GTCPR, used to latch the value of the counter when a defined transition of
TINx is sensed by the corresponding input capture edge detector.
• Normal gate mode enables the count on a falling edge of the TGATE pin and disables the count on
the rising edge of TGATE. This mode allows the timer to count conditionally, based on the state of
TGATE.
• The restart gate mode performs the same function as normal mode, except it also resets the counter
on the falling edge of the TGATE pin. This mode has applications in pulse interval measurement
and bus monitoring.
5.7.4 GTM External Signal Description
This section provides an overview and detailed descriptions of the GTM signals.
There are four distinct external input timer capture signals (TIN1, TIN2, TIN3, and TIN4), four distinct
external input timer get signals (TGATE1, TGATE2, TGATE3, and TGATE4), and four distinct external
timer output signals (TOUT1, TOUT2, TOUT3, and TOUT4). The GTM interface signals are defined in
Table 5-54.
Name Port
TIN1 TIN1
TIN2 TIN2
TIN3 TIN3
TIN4 TIN4
TGATE1 TGATE1
TGATE2 TGATE2
TGATE3 TGATE3
TGATE4 TGATE4
TOUT1 TOUT1
TOUT2 TOUT2
TOUT3 TOUT3
TOUT4 TOUT4
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
5-52
Table 5-54. GTM Signal Properties
Function
Global timer 1 capture control signal
Global timer 2 capture control signal
Global timer 3 capture control signal
Global timer 4 capture control signal
Global timer 1 counter gate control signal
Global timer 2 counter gate control signal
Global timer 3 counter gate control signal
Global timer 4 counter gate control signal
Global timer 1 counter output signal
Global timer 2 counter output signal
Global timer 3 counter output signal
Global timer 4 counter output signal
Require
I/O Reset
Pull Up
I 0 No
I 0 No
I 0 No
I 0 No
I 0 No
I 0 No
I 0 No
I 0 No
O 1 No
O 1 No
O 1 No
O 1 No
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