Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 773

Bits Name
8–9 B1CTL Location of byte 1 of property ARB.
00 Byte 1 is not extracted, and appears as zero in property ARB.
01 Byte 1 is located in the received frame at offset (B1OFFSET – 8) bytes from the first byte of the
10 Byte 0 is located in the received frame at offset B1OFFSET bytes from the byte after the last byte of
11 Byte 0 is located in the received frame at offset B1OFFSET bytes from the byte after the last byte of
10–15 B1OFFSET Offset relative to the header defined by B1CTL that locates byte 1 of property ARB. An effective offset
of zero points to the first byte of the specified header.
16–17 B2CTL Location of byte 2 of property ARB.
00 Byte 2 is not extracted, and appears as zero in property ARB.
01 Byte 2 is located in the received frame at offset (B2OFFSET – 8) bytes from the first byte of the
10 Byte 0 is located in the received frame at offset B2OFFSET bytes from the byte after the last byte of
11 Byte 0 is located in the received frame at offset B2OFFSET bytes from the byte after the last byte of
18–23 B2OFFSET Offset relative to the header defined by B2CTL that locates byte 2 of property ARB. An effective offset
of zero points to the first byte of the specified header.
24–25 B3CTL Location of byte 3 of property ARB.
00 Byte 3 is not extracted, and appears as zero in property ARB.
01 Byte 3 is located in the received frame at offset (B3OFFSET – 8) bytes from the first byte of the
10 Byte 0 is located in the received frame at offset B3OFFSET bytes from the byte after the last byte of
11 Byte 0 is located in the received frame at offset B3OFFSET bytes from the byte after the last byte of
26–31 B3OFFSET Offset relative to the header defined by B3CTL that locates byte 3 of property ARB. An effective offset
of zero points to the first byte of the specified header.
15.5.3.3.6 Receive Queue Filer Table Address Register (RQFAR)
RQFAR, shown in Figure
received queue filer table. Each table entry occupies a pair of 32-bit words, denoted RQCTRL and
RQPROP. To access the RQCTRL and RQPROP words of entry n, write n to RQFAR. Then read or write
the indexed RQCTRL and RQPROP words by reading or writing the RQFCR and RQFPR registers,
respectively.
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
Table 15-31. RBIFX Field Descriptions (continued)
Ethernet DA. In non-FIFO modes, a negative effective offset points to bytes of the standard Ethernet
preamble. Values of B1OFFSET less than 8 are reserved in FIFO modes.
the layer 2 header.
the layer 3 header.
Ethernet DA. In non-FIFO modes, a negative effective offset points to bytes of the standard Ethernet
preamble. Values of B2OFFSET less than 8 are reserved in FIFO modes.
the layer 2 header.
the layer 3 header.
Ethernet DA. In non-FIFO modes, a negative effective offset points to bytes of the standard Ethernet
preamble. Values of B3OFFSET less than 8 are reserved in FIFO modes.
the layer 2 header.
the layer 3 header.
15-27, contains the index of the current, indirectly accessible entry of the
Enhanced Three-Speed Ethernet Controllers
Description
15-55