Freescale Semiconductor MPC8313E PowerQUICC II Pro Family Reference Manual page 55

Table
Number
i Acronyms and Abbreviated Terms...................................................................................... lxxvii
1-1 Supported eTSEC1 and eTSEC2 Configurations ................................................................. 1-12
2-1 Memory Map........................................................................................................................... 2-2
3-1 MPC8313E Signal Reference by Functional Block................................................................ 3-3
3-2 Reset Configuration Signals.................................................................................................. 3-12
3-3 Output Signal States During System Reset ........................................................................... 3-13
3-4 Signals for Multiplexing ....................................................................................................... 3-14
3-5 External Signals—Detailed Signal Descriptions .................................................................. 3-14
4-1 System Control Signals ........................................................................................................... 4-1
4-2 External Clock Signals............................................................................................................ 4-3
4-3 Reset Causes ........................................................................................................................... 4-5
4-4 Reset Actions .......................................................................................................................... 4-6
4-5 Reset Configuration Words Source....................................................................................... 4-10
4-6 SYS_CLK_IN Division ........................................................................................................ 4-11
4-7 Selecting Reset Configuration Input Signals ........................................................................ 4-11
4-8 RCWLR Bit Settings............................................................................................................. 4-13
4-9 System PLL Ratio ................................................................................................................. 4-14
4-10 SPMF Maximum Values ....................................................................................................... 4-14
4-11 Reset Configuration Word High Bit Settings........................................................................ 4-15
4-12 PCI Host/Agent Configuration.............................................................................................. 4-16
4-13 Boot Memory Space.............................................................................................................. 4-17
4-14 Boot Sequencer Configuration.............................................................................................. 4-17
4-15 Boot ROM Location.............................................................................................................. 4-18
4-16 eTSEC1 Mode Configuration ............................................................................................... 4-19
4-17 eTSEC2 Mode Configuration ............................................................................................... 4-20
4-18 e300 Core True Little-Endian ............................................................................................... 4-20
4-19 LALE Configuration ............................................................................................................. 4-21
4-20 Local Bus Configuration EEPROM Addresses .................................................................... 4-21
4-21 Local Bus Reset Configuration Words Data Structure.......................................................... 4-21
4-22 Local Bus Controller Setting When Loading RCW.............................................................. 4-22
4-23 Hard Coded Reset Configuration Word Low Fields Values ................................................. 4-26
4-24 Hard-Coded Reset Configuration Word High Field Values .................................................. 4-27
4-25 Examples For Hard-Coded Reset Configuration Words Usage............................................ 4-27
4-26 Configurable Clock Units ..................................................................................................... 4-31
4-27 Reset Configuration and Status Registers Memory Map...................................................... 4-32
4-28 Reset Status Register Field Descriptions .............................................................................. 4-33
4-29 RMR Field Descriptions ....................................................................................................... 4-35
4-30 RPR Bit Descriptions ............................................................................................................ 4-36
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Freescale Semiconductor
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